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Computing · Year 9

Active learning ideas

The Fetch-Decode-Execute Cycle

Active learning works for the Fetch-Decode-Execute cycle because students need to physically experience the step-by-step process to grasp its sequential nature. Moving from abstract diagrams to role-play and tactile sorting helps them internalize how instructions are handled one at a time, matching the CPU’s real operations.

National Curriculum Attainment TargetsKS3: Computing - Hardware and ProcessingKS3: Computing - Computer Architecture
25–45 minPairs → Whole Class4 activities

Activity 01

Simulation Game45 min · Small Groups

Role-Play: CPU Assembly Line

Assign roles: one student as memory, one as fetch unit, one as decoder, one as executor, and a clock ticker. Provide instruction cards; groups simulate 10 cycles, recording outputs. Switch roles and discuss bottlenecks.

Explain each stage of the Fetch-Decode-Execute cycle and its purpose.

Facilitation TipIn the CPU Assembly Line role-play, have students stand in a straight line to physically pass instruction cards from one stage to the next, emphasizing the time delay between stages.

What to look forProvide students with a simplified instruction (e.g., 'ADD 5 to Register A'). Ask them to write down what happens in the Fetch stage, the Decode stage (identifying opcode and operand), and the Execute stage. Review responses for accuracy in identifying each step's action.

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Activity 02

Simulation Game30 min · Pairs

Flowchart Builder: Cycle Tracing

Give students blank flowcharts and sample programs. In pairs, they draw arrows for fetch, decode, execute steps, then simulate execution with counters. Compare class versions to identify common errors.

Predict what would happen if one stage of the FDE cycle failed or was significantly slowed down.

Facilitation TipDuring the Flowchart Builder activity, circulate and ask guiding questions like 'What arrow represents the program counter update?' to push students to connect symbols to actions.

What to look forPose the question: 'Imagine the CPU clock speed is suddenly halved. What observable effect might a user notice on their computer, and why?' Facilitate a class discussion where students connect clock speed directly to the FDE cycle and program execution speed.

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Activity 03

Simulation Game35 min · Whole Class

Failure Prediction: Clock Slowdown

Whole class views a CPU simulator video slowed to show one cycle. Students predict and note effects on program run time, then test with paper-based timers on simple loops.

Analyze how the speed of the CPU clock affects the rate of the FDE cycle.

Facilitation TipWhen students perform the Failure Prediction task, provide stopwatches so they can measure how many cycles occur in ten seconds at different clock speeds, linking ticks to real time.

What to look forOn a slip of paper, have students draw a simple diagram of the FDE cycle, labeling the key actions in each stage. Ask them to write one sentence explaining what would happen if the 'Decode' stage failed to correctly interpret an instruction.

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Activity 04

Simulation Game25 min · Individual

Card Sort: Cycle Stages

Distribute shuffled cards with stage descriptions, actions, and diagrams. Individuals or pairs sequence them correctly, then justify order in group share-out.

Explain each stage of the Fetch-Decode-Execute cycle and its purpose.

Facilitation TipFor the Card Sort activity, assign each pair of students a different instruction type to ensure varied examples are explored across the class.

What to look forProvide students with a simplified instruction (e.g., 'ADD 5 to Register A'). Ask them to write down what happens in the Fetch stage, the Decode stage (identifying opcode and operand), and the Execute stage. Review responses for accuracy in identifying each step's action.

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A few notes on teaching this unit

Teachers should avoid presenting the Fetch-Decode-Execute cycle as a single static diagram. Instead, use movement and repetition to build memory. Research shows that when students physically act out the cycle, their retention of the sequence improves significantly. Emphasize the clock’s role as the heartbeat that drives progress, and correct the idea of parallel processing early by making sequencing unavoidable through structured tasks.

By the end of these activities, students will clearly explain and demonstrate how each stage of the cycle contributes to program execution. They will trace instructions accurately, predict the impact of clock speed changes, and identify common misconceptions through hands-on tasks.


Watch Out for These Misconceptions

  • During the CPU Assembly Line role-play, watch for students moving multiple instructions at once or skipping stages, as this reinforces the misconception that the CPU processes instructions simultaneously.

    Pause the role-play and ask the group to explain the signal system. Have each student wait for the 'next stage ready' signal before passing their card, making the sequential nature explicit and unavoidable.

  • During the Flowchart Builder activity, watch for students drawing a single loop for all stages, which incorrectly suggests the cycle repeats only once.

    Ask students to label each arrow with the action it represents, such as 'Fetch next instruction' or 'Update program counter.' This forces them to show multiple cycles and correct the loop structure.

  • During the Failure Prediction: Clock Slowdown task, watch for students who believe halving the clock speed only affects power usage, not cycle speed.

    Have students time their 10-second cycle counts at each clock speed and compare totals. Ask them to explain how fewer cycles per second would impact program completion time, linking speed directly to performance.


Methods used in this brief