CPU: Fetch-Execute Cycle & Registers

Active learning turns the abstract Fetch-Execute cycle into something students can see and feel, replacing static diagrams with muscle memory. When learners physically step through each register’s role, the mechanical nature of the CPU becomes memorable long before exam season arrives.

• Year 10
• Computing
• 3 activities
• 15 min–40 min

Learning Objectives

1. Explain the sequence of operations within the Fetch-Execute cycle, detailing the role of each stage.
2. Compare the function and data storage capacity of key CPU registers, including the Program Counter, Memory Address Register, and Accumulator.
3. Analyze how the clock speed of a processor influences the execution time of a given instruction set.
4. Design a simplified block diagram of a CPU, illustrating the flow of data between registers and the Arithmetic Logic Unit during the Fetch-Execute cycle.

Role Play

⏱ 40 min·Whole Class

Role Play: The Human CPU

Assign students roles such as the ALU, Control Unit, and specific registers like the MAR and MDR. Use physical cards as 'data' and have the class execute a simple addition program by physically moving the cards according to the Fetch-Execute cycle.

Prepare & details

Analyze how the clock speed of a processor dictates the limits of software performance.

Facilitation Tip: During the Human CPU role play, give each student a small whiteboard so they can jot the value of their register after every step and hold it up for instant peer feedback.

Setup: Open space or rearranged desks for scenario staging

Materials: Character cards with backstory and goals, Scenario briefing sheet

• Apply
• Analyze
• Evaluate
• Social Awareness
• Self-Awareness

Formal Debate

⏱ 30 min·Small Groups

Formal Debate: The Performance Paradox

Divide the class into teams representing 'High Clock Speed', 'Multi-core Architecture', and 'Large Cache'. Students must argue why their specific feature is the most important for different user scenarios, such as gaming versus video editing.

Prepare & details

Compare the trade-offs between increasing cache size and adding more processing cores.

Facilitation Tip: In the Structured Debate, hand out sentence stems like ‘Higher clock speed improves… but at the cost of…’ to keep arguments focused on CPU architecture rather than brand loyalty.

Setup: Two teams facing each other, audience seating for the rest

Materials: Debate proposition card, Research brief for each side, Judging rubric for audience, Timer

• Analyze
• Evaluate
• Create
• Self-Management
• Decision-Making

Think-Pair-Share

⏱ 15 min·Pairs

Think-Pair-Share: Overclocking Risks

Students research the concept of overclocking and discuss the physical consequences for the hardware. They then pair up to list three pros and three cons before sharing their findings with the class to create a master list of CPU limitations.

Prepare & details

Design a processor architecture to prioritize energy efficiency over raw speed.

Facilitation Tip: For the Think-Pair-Share on overclocking, provide a one-page datasheet with power draw and temperature curves so students quantify risks instead of relying on anecdotes.

Setup: Standard classroom seating; students turn to a neighbor

Materials: Discussion prompt (projected or printed), Optional: recording sheet for pairs

• Understand
• Apply
• Analyze
• Self-Awareness
• Relationship Skills

Teaching This Topic

Start with a brief live demo of a simple assembly instruction moving between registers before any role play begins. Research shows that seeing the cycle once in real time prevents students from treating registers as abstract icons. Avoid spending too much time on clock cycles or pipeline diagrams until students can explain why a single instruction needs fetch, decode, execute anyway. Keep the first concrete example to three instructions so the cognitive load is manageable.

What to Expect

Students will not just name registers but will explain how the Program Counter and Accumulator work together during each tick of the clock. By the end of the sequence they should trace a three-instruction program, predict register states, and justify design trade-offs in under two minutes.

Watch Out for These Misconceptions

Common Misconception

During the Structured Debate, watch for students asserting that doubling cores always doubles speed.

What to Teach Instead

Redirect the debate to the provided datasheet: ask them to compare single-threaded and multi-threaded benchmarks for the same CPU model so they see the software dependency firsthand.

Common Misconception

During the Human CPU role play, watch for students anthropomorphising the CPU by saying it 'understands' the data.

What to Teach Instead

Hand each student a printed two-line program and instruct them to follow the instructions blindly, without interpreting the values; this mechanical obedience makes the lack of semantic knowledge explicit.

Assessment Ideas

Quick Check

After the Human CPU role play, present students with a short, simplified assembly-like code snippet and ask them to trace the Fetch-Execute cycle for the first three instructions, specifically noting the state of the Program Counter and Accumulator after each instruction.

Discussion Prompt

During the Structured Debate, pose the question: 'If you were designing a CPU for a smartphone, would you prioritize a very high clock speed or a larger cache? Justify your choice by explaining the trade-offs involved, referencing the datasheet provided earlier.'

Exit Ticket

After the Think-Pair-Share on overclocking, have students define the term 'Fetch-Execute Cycle' in their own words and list two registers involved, stating the primary function of each on an index card.

Extensions & Scaffolding

• Challenge: Ask students to design a 4-instruction program that deliberately uses the Accumulator to overflow and then explain how the CPU flags the status.
• Scaffolding: Provide a partially filled register-state table with blanks only for the values the students must compute.
• Deeper exploration: Have students research how modern CPUs handle out-of-order execution and present a one-slide summary comparing it to the strict fetch-execute sequence they role-played.

Key Vocabulary

Fetch-Execute Cycle	The fundamental process by which a CPU retrieves an instruction from memory, decodes it, executes it, and stores the result.
Program Counter (PC)	A register that holds the memory address of the next instruction to be fetched. It automatically increments after each instruction fetch.
Accumulator (ACC)	A register used to store the intermediate results of arithmetic and logic operations performed by the Arithmetic Logic Unit (ALU).
Memory Address Register (MAR)	A register that holds the memory address of the data or instruction that the CPU wishes to read from or write to.
Clock Speed	The rate at which the CPU's internal clock generates pulses, measured in Hertz (Hz), which synchronizes the execution of instructions.